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ICS85357-01 数据表(PDF) 1 Page - Integrated Circuit Systems

部件名 ICS85357-01
功能描述  4:1 OR 2:1 DIFFERENTIAL-TO-3.3V LVPECL / ECL CLOCK MULTIPLEXER
PDF  12 Pages
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制造商  ICST [Integrated Circuit Systems]
网页  http://www.icst.com
标志 ICST - Integrated Circuit Systems

ICS85357-01 数据表(HTML) 1 Page - Integrated Circuit Systems

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85357AG-01
www.icst.com/products/hiperclocks.html
REV. A JULY 16, 2001
1
Integrated
Circuit
Systems, Inc.
ICS85357-01
4:1 OR 2:1
DIFFERENTIAL-TO-3.3V LVPECL / ECL CLOCK MULTIPLEXER
BLOCK DIAGRAM
PIN ASSIGNMENT
VCC
CLK0
nCLK0
CLK1
nCLK1
CLK2
nCLK2
CLK3
nCLK3
VEE
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
VCC
SEL1
SEL0
VCC
Q0
nQ0
VCC
nc
nc
VEE
ICS85357-01
20-Lead TSSOP
4.40mm x 6.50mm x 0.90mm body package
G Package
Top View
CLK0
nCLK0
CLK1
nCLK1
CLK2
nCLK2
CLK3
nCLK3
Q0
nQ0
00
11
01
10
SEL1 SEL0
GENERAL DESCRIPTION
The ICS85357-01 is a 4:1 or 2:1 Differential-to-
3.3V LVPECL / ECL clock multiplexer which can
operate up to 750MHz and is a member of the
HiPerClockS™ family of High Performance Clock
Solutions from ICS. The ICS85357-01 has 4
selectable clock inputs. The CLK, nCLK pair can accept most
standard differential input levels. The device can operate
using a 3.3V LVPECL (V
EE = 0V, VCC = 3.135V to 3.465V) or
3.3V ECL (V
CC = 0V, VEE = -3.135V to -3.465V). The fully dif-
ferential architecture and low propagation delay make it
ideal for use in clock distribution circuits. The select pins have
internal pulldown resistors. Leaving one input unconnected
(pulled to logic low by the internal resistor) will transform
the device into a 2:1 multiplexer. The SEL1 pin is the most
significant bit and the binary number applied to the select pins
will select the same numbered data input (i.e., 00
selects CLK0, nCLK0).
FEATURES
• High speed differential multiplexer. The device can be
configured as either a 4:1 or 2:1 multiplexer
• 1 differential 3.3V LVPECL output
• 4 selectable CLK, nCLK inputs
• CLK, nCLK pair can accept the following differential input
levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL
• Maximum output frequency up to 750MHz
• Translates any single ended input signal to 3.3V LVPECL
levels with resistor bias on nCLKx input
• Part-to-part skew: 150ps (maximum)
• Propagation delay: 1.5ns (maximum)
• LVPECL mode operating voltage supply range:
V
CC = 3.135V to 3.465V, VEE = 0V
• ECL mode operating voltage supply range:
V
CC = 0V, VEE = -3.135V to -3.465V
• 0°C to 70°C ambient operating temperature
• Industrial temperature information available upon request
HiPerClockS™
,&6


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