6.04

6

IDT7134SA/LA

HIGH-SPEED 4K x 8 DUAL-PORT STATIC RAM

MILITARY AND COMMERCIAL TEMPERATURE RANGES

2720 drw 09

CE

OE

50%

50%

CURRENT

NOTES:

1. Timing depends on which signal is asserted last,

OE or CE.

2. Timing depends on which signal is de-asserted first,

OE or CE.

3. R/

AC ELECTRICAL CHARACTERISTICS OVER THE

7134X20

(5)

7134X25

7134X35

Symbol

Parameter

Min.

Max.

Min.

Max.

Min.

Max.

Unit

WRITE CYCLE

Write Cycle Time

20

—

25

—

35

—

ns

Chip Enable to End-of-Write

15

—

20

—

30

—

ns

Address Valid to End-of-Write

15

—

20

—

30

—

ns

Address Set-up Time

0

—

0

—

0

—

ns

Write Pulse Width

15

—

20

—

25

—

ns

Write RecoveryTime

0

—

0

—

0

—

ns

Data Valid to End-of-Write

15

—

15

—

20

—

ns

Output High-Z Time

(1, 2)

—15—

15

—20

ns

Data Hold Time

(3)

0—

0

—

3—

ns

Write Enabled to Output in High-Z

(1, 2)

—15—

15

—20

ns

Output Active from End-of-Write

(1, 2, 3)

3—

3

—

3—

ns

Write Pulse to Data Delay

(4)

—40—

50

—60

ns

Write Data Valid to Read Data Delay

(4, 7)

—30—

30

—35

ns

NOTES:

2720 tbl 10

1. Transition is measured

±500mV from Low or High-impedance voltage with Output Test Load (Figure 2).

2. This parameter is guaranteed by device characterization, but is not production tested.

4. Port-to-port delay through RAM cells from writing port to reading port, refer to “Timing Waveform of Write with Port-to-Port Read”.

5. (Commercial only), 0

°C to +70°C temperature range .

6. “X” in part number indicates power rating (SA or LA).