8

IMP690A

, 802L, 802M, 805L

Application Information

Power Fail Hysteresis

A noise margin can be added to the simple monitoring circuit of

Figure 7 by adding positive feedback from the



PFO pin. The cir-

cuit of Figure 8 adds this positive “latching” effect by means of an

additional resistor R3 connected between



PFO and PFI which

helps in pulling PFI in the direction of



PFO and eliminating an

indecision at the trip point. Resistor R3 is normally about 10 times

higher in resistance than R2 to keep the hysteresis band reason-

able and should be larger than 10k

Ω to avoid excessive loading on

the



PFO pin. The calculations for the correct values of resistors to

set the hysteresis thresholds are given in Figure 8. A capacitor can

be added to offer additional noise rejection by low-pass filtering.

Figure 8. Hysteresis added to PFI pin

690A_10.eps

0V

PFO

+5V

0V

GND

IMP690A

IMP692A

IMP802L

IMP802M

IMP805L

PFI

PFO

+5V

To

µP

*Optional

C1*

V

R

R

R

V

R

R

R

R

R

V

R

R

R

TRIP

IH

L

=

+









=

+













−

+

−

=

1 25

1 25

1 25

5 1 25

1 25

2

2

2

2

3

1

2

3

1

3

2

.

.

.

.

.

Monitoring Capabilities of the Power-Fail Input

Although designed for power supply failure monitoring, the PFI

pin can be used for monitoring any voltage condition that can be

scaled by means of a resistive divider. An example is the negative

power supply monitor configured in Figure 9. In this case a good

negative supply will hold the PFI pin below 1.25V and the



PFO

pin will be at a logic “0”. As the negative voltage declines,

the voltage at the PFI pin will rise until it exceeds 1.25V and

the



PFO pin will go to a logic “1”.

Figure 9. Using PFI to monitor negative supply voltage

5 1 25

1 25

1

2

−

=

−

.

.

R

V

R

TRIP

690A_11.eps

+5V

GND

0V

PFO

+5V

0V

V–

IMP690A

IMP692A

IMP802L

IMP802M

IMP805L

V–

PFI

PFO