©

1999 IMP, Inc.

408-432-9100/www.impweb.com

7

IMP705/6/7/8, 8

3L

Power Fail circuitry. If a resistive divider is connected from the

voltage to be monitored to the Power Fail input, PFI, the PFO

(output) will go LOW if the divider voltage goes below its 1.25V

reference. Should hysteresis be desired, connect a resistor (equal

to approximately 10 times the sum of the two resistors in the

divider) between the PFI and PFO pins. A capacitor between PFI

and GND will reduce circuit sensitivity to input high-frequency

noise. If it is desired to assert a RESET in addition to the PFO flag,

this may be achieved by connecting the PFO output to MR.

Monitoring a Negative Voltage

The Power-Fail circuitry can also monitor a negative supply rail.

When the negative rail is OK, PFO will be LOW, and when the

negative rail is failing (not negative enough), PFO goes HIGH

(the opposite of when positive voltages are monitored). To trigger

a reset, these outputs need to be inverted: adding the resistors

and transistor as shown achieves this. The RESET output will

then have the same sense as for positive voltages: good = HIGH,

bad = LOW. It should be noted that this circuit’s accuracy depends

IMP70x

GND

RESET

To Processor

12V Threshold

~10.87V

PFO

MR

PFI

1M

9

130k

9

705_07.eps

IMP70x

+

—

+5V

Negative Input

Voltage

GND

RESET

PFO

MR

PFI

RP

RN

705_09.eps

5 1 25

1 25

−

=

−

..

RP

V

RN

TRIP

Application Information

Figure 5. Monitoring a Negative Voltage