REV. A

AD1853

–9–

Table III. Digital Timing

Min

Units

CCLK HI Pulsewidth

40

ns

CCLK LOW Pulsewidth

40

ns

CDATA Setup Time

10

ns

CDATA Hold Time

10

ns

CLATCH LOW Pulsewidth

10

ns

CLATCH HI Pulsewidth

10

ns

SPI REGISTER DEFINITIONS

The SPI port allows flexible control of many chip parameters.

It is organized around three registers; a LEFT-CHANNEL

VOLUME register, a RIGHT-CHANNEL VOLUME register

and a CONTROL register. Each WRITE operation to the

AD1853 SPI control port requires 16 bits of serial data in

MSB-first format. The bottom two bits are used to select one

of three registers, and the top 14 bits are then written to that

register. This allows a write to one of the three registers in a

single 16-bit transaction.

The SPI CCLK signal is used to clock in the data. The incom-

ing data should change on the falling edge of this signal. At the

end of the 16 CCLK periods, the CLATCH signal should rise

to latch the data internally into the AD1853.

Register Addresses

The lowest two bits of the 16-bit input word are decoded as

follows to set the register into which the upper 14 bits will be

written.

Bit 1

Bit 0

Register

00Volume Left

10Volume Right

01Control Register

VOLUME LEFT and VOLUME RIGHT Registers

A write operation to the left or right volume registers will acti-

vate the “auto-ramp” clickless volume control feature of the

AD1853. This feature works as follows. The upper 10 bits of

the volume control word will be incremented or decremented by

1 at a rate equal to the input sample rate. The bottom 4 bits are

not fed into the auto-ramp circuit and thus take effect immedi-

ately. This arrangement gives a worst-case ramp time of about

determined by listening tests to be optimal in terms of pre-

venting the perception of a “click” sound on large volume

changes. See Figure 8 for a graphical description of how the

volume changes as a function of time.

The 14-bit volume control word is used to multiply the signal,

and therefore the control characteristic is linear, not dB. A con-

stant dB/step characteristic can be obtained by using a lookup

table in the microprocessor that is writing to the SPI port.

20ms

TIME

–60

–60

0

0

VOLUME REQUEST REGISTER

ACTUAL VOLUME REGISTER

Figure 8. Smooth Volume Control