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82503 数据表(PDF) 20 Page - Intel Corporation |
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82503 数据表(HTML) 20 Page - Intel Corporation |
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20 / 45 page ![]() 82503 70 ELECTRICAL SPECIFICATIONS AND TIMINGS ABSOLUTE MAXIMUM RATINGS Case Temperature Under Bias 0 Cto a85 C Storage Temperature b 65 Cto a140 C All Output and Supply Voltages b 05V to a7V All Input Voltages b 10V to a60V(1) NOTICE This is a production data sheet The specifi- cations are subject to change without notice WARNING Stressing the device beyond the ‘‘Absolute Maximum Ratings’’ may cause permanent damage These are stress ratings only Operation beyond the ‘‘Operating Conditions’’ is not recommended and ex- tended exposure beyond the ‘‘Operating Conditions’’ may affect device reliability DC CHARACTERISTICS (TC e 0 Cto a85 C VCC e 5V g5% VCCA e 5V g5%) Symbol Parameter Min Max Units Test Conditions VIL(TTL)(2) Input Low Voltage b 03 08 V VIH(TTL)(2) Input High Voltage 20 VCC V ILI(2) Input Leakage Current g 10 m A 00V s VI s VCC RESET e 1 VOL(MOS)(3) Output Low Voltage 045 V IOL e 4mA VOH(MOS) Output High Voltage 39 V IOH eb500 mA VOL(LED)(4) Output Low Voltage 045 V IOL e 10 mA VOH(LED) Output High Voltage 39 V IOH eb500 mA ILP Leakage Current Low g 10 m A 00V s VI s VCC Power Mode(5) RDIFF Input Differential Resistance(6) 10 kX dc VIDF(TPE)(7) Input Differential Accept g 0500 g 31 VP 5 MHz s f s 10 MHz Input Differential Reject g 0300 VP Input Differential Accept (XSQ) (Note 8) g 31 VP Input Differential Reject (XSQ) g 0180 VP RS(TPE)(8) Output Source Resistance 6 13 X lILOADl e 25 mA VIDF(AUI)(9) Input Differential Accept g 0300 g 15 VP Input Differential Reject g 0160 VP VODF(AUI)(10) Output Differential Voltage g 0450 g 120 V NOTES 1 The voltage levels for RCV CLSN and RD pairs are b075V to a85V 2 TTL Input Pins TxD RTS TPEAUI APORT APOLXSQ LID CS0 CS1 LPBK JABD TEST RESET 3 MOS Output Pins TxC RxD RxC CRS CDT 4 LED Pins TPEAUI TxLED RxLED COLED POLED LILED VOL measured 10 ns after falling edge of TxC 5 Pins APORT APOLXSQ LID TPEAUI POLED LILED RTS LPBK RxD TxD CRS CDT CS0 CS1 JABD TEST and RESET 6 Pins RD to RD RCV to RCV and CLSN to CLSN 7 TPE Input Pins RD and RD See Section 334 and Section 335 8 Typically it is b45 dB below normal squelch level 9 TPE Output Pins TDH TDH TDL and TDL RS measures VCC or VSS to Pin 10 AUI Input Pins RCV and CLSN pairs 11 AUI Output Pins TRMT pair 20 |
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