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CDP1854A/3 数据表(PDF) 18 Page - Intersil Corporation

部件名 CDP1854A/3
功能描述  Programmable Universal Asynchronous Receiver/Transmitter (UART)
PDF  21 Pages
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制造商  INTERSIL [Intersil Corporation]
网页  http://www.intersil.com/cda/home
标志 INTERSIL - Intersil Corporation

CDP1854A/3 数据表(HTML) 18 Page - Intersil Corporation

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Dynamic Electrical Specifications TA = -40oC to +85oC, VDD ±5%, tR, tF = 20ns, VIH = 0.7 VDD, VIL = 0.3 VDD, CL = 100pF,
(See Figure 10)
PARAMETER
VDD
(V)
LIMITS
UNITS
CDP1854A
CDP1854AC
(NOTE 1)
TYP
(NOTE 2)
MAX
(NOTE 1)
TYP
(NOTE 2)
MAX
TRANSMITTER TIMING - MODE 0
Minimum Clock Period
tCC
5
250
310
250
310
ns
10
125
155
-
-
ns
Minimum Pulse Width
Clock Low Level
tCL
5
100
125
100
125
ns
10
75
100
-
-
ns
Clock High Level
tCH
5
100
125
100
125
ns
10
75
100
-
-
ns
THRL
tTHTH
5
100
150
100
150
ns
10
50
75
-
-
ns
Minimum Setup Time
THRL to Clock
tTHC
5
175
275
175
275
ns
10
90
150
-
-
ns
Data to THRL
tDT
5
20502050
ns
10
0
40
-
-
ns
Minimum Hold Time
Data after THRL
tTD
5
80
120
80
120
ns
10
40
60
-
-
ns
Propagation Delay Time
Clock to Data Start Bit
tCD
5
300
450
300
450
ns
10
150
225
-
-
ns
Clock to THRE
tCT
5
200
300
200
300
ns
10
100
150
-
-
ns
THRL to THRE
tTTHR
5
200
300
200
300
ns
10
100
150
-
-
ns
Clock to TSRE
tTTS
5
200
300
200
300
ns
10
100
150
-
-
ns
NOTES:
1. Typical values for TA = 25
oC and nominal voltages.
2. Maximum limits of minimum characteristics are the values above which all devices function.
CDP1854A, CDP1854AC



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