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AD9877 数据表(PDF) 21 Page - Analog Devices |
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AD9877 数据表(HTML) 21 Page - Analog Devices |
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21 / 36 page ![]() AD9877 Rev. B | Page 21 of 36 Table 7. Cable Driver Gain Control Bits [7:4] CA Interface Transmit Word 0000 0000 0000 (default) 0001 0000 0001 0010 0000 0010 0011 0000 0100 0100 0000 1000 0101 0001 0000 0110 0010 0000 0111 0100 0000 1000 1000 0000 In this mode, the lower bits determine the fine gain setting of the DAC output. Table 8. DAC Output Fine Gain Setting Bits [3:0] DAC Fine Gain 0000 0.0 dB (default) 0001 0.5 dB 0010 1.0 dB 0011 1.5 dB ... ... 1110 7.0 dB 1111 7.5 dB New data is automatically sent over the 3-wire CA interface (and DAC gain adjust) whenever the value of the active gain control register changes or a new profile is selected. The default value is 0x00 (lowest gain). The formula for the combined output level calculation of the AD9877 fine gain and the AD8327 or AD8322 coarse gain is V8327 = V9877(0) + (fine)/2 + 6(coarse) − 19 V8322 = V9877(0) + (fine)/2 + 6(coarse) − 14 where: fine is the decimal value of Bits [3:0]. coarse is the decimal value of Bits [7:8]. V9877(0) is the level at AD9877 output in dBmV for fine = 0. V8327 is the level at output of the AD8327 in dBmV. V8322 is the level at output of the AD8322 in dBmV. |
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