ADCMP609

Data Sheet

MINIMUM INPUT SLEW RATE REQUIREMENT

With the rated load capacitance and normal good PCB design

practice (as discussed in the Optimizing Performance section),

these comparators should be stable at any input slew rate with

no hysteresis. Broadband noise from the input stage is observed

in place of the violent chatter seen with most other high speed

comparators. With additional capacitive loading or poor bypassing,

oscillation may be encountered. These oscillations are due to the

high gain bandwidth of the comparator in combination with

feedback through parasitics in the package and PCB. In many

applications, chatter is not harmful.

Rev. C | Page 10 of 12