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数据搜索系统，热门电子元器件搜索 |
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ICL7129RCPL 数据表(PDF) 4 Page - Intersil Corporation |
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ICL7129RCPL 数据表(HTML) 4 Page - Intersil Corporation |
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4 / 11 page  3-34 Pin Descriptions PIN SYMBOL DESCRIPTION 1 OSC1 Input to first clock inverter. 2 OSC3 Output of second clock inverter. 3 ANNUNCIATOR DRIVE Backplane squarewave output for driving annunciators. 4B1, C1, CONT Output to display segments. 5A1, G1, D1 Output to display segments. 6F1, E1, DP1 Output to display segments. 7B2, C2, LO BATT Output to display segments. 8A2, G2, D2 Output to display segments. 9F2, E2, DP2 Output to display segments. 10 B3, C3, MINUS Output to display segments. 11 A3, G3, D3 Output to display segments. 12 F3, E3, DP3 Output to display segments. 13 B4, C4, BC5 Output to display segments. 14 A4, D4, G4 Output to display segments. 15 F4, E4, DP4 Output to display segments. 16 BP3 Backplane #3 output to display. 17 BP2 Backplane #2 output to display. 18 BP1 Backplane #1 output to display. 19 VDlSP Negative rail for display drivers. 20 DP4/OR INPUT: When HI, turns on most significant decimal point. OUTPUT: Pulled HI when result count exceeds ±19,999. 21 DP3/UR INPUT: Second most significant decimal point on when HI. OUTPUT: Pulled HI when result count is less than ±1,000. 22 LATCH/HOLD INPUT: When floating, A/D converter operates in the free-run mode. When pulled HI, the last displayed reading is held. When pulled LO, the result counter contents are shown incrementing during the de-integrate phase of cycle. OUTPUT: Negative going edge occurs when the data latches are updated. Can be used for converter status signal. 23 V- Negative power supply terminal. 24 V+ Positive power supply terminal, and positive rail for display drivers. 25 INT IN Input to integrator amplifier. 26 INT OUT Output of integrator amplifier. 27 CONTINUITY INPUT: When LO, continuity flag on the display is off. When HI, continuity flag is on. OUTPUT: HI when voltage between inputs is less than +200mV. LO when voltage between inputs is more than +200mV. 28 COMMON Sets common-mode voltage of 3.2V below V+ for DE, 10X, etc., Can be used as pre-regulator for external reference. 29 CREF+ Positive side of external reference capacitor. 30 CREF- Negative side of external reference capacitor. 31 BUFFER Output of buffer amplifier. 32 IN LO Negative input voltage terminal. 33 IN HI Positive input voltage terminal. 34 REF HI Positive reference voltage input terminal. 35 REF LO Negative reference voltage input terminal. 36 DGND Ground reference for digital section. 37 RANGE 3 µA pull-down for 200mV scale. Pulled HIGH externally for 2V scale. 38 DP2 Internal 3 µA pull-down. When HI, decimal point 2 will be on. 39 DP1 Internal 3 µA pull-down. When HI, decimal point 1 will be on. 40 OSC2 Output of first clock inverter. Input of second clock inverter. PIN SYMBOL DESCRIPTION ICL7129 |
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