HMIC Silicon PIN Diode SP3T Switch with Integrated Bias Network

2 - 18 GHz

Rev. V1

MASW-011053

3

3

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3

Circuit Schematic

Condition of

RF Output

J5

J6

J7

J1-J2

J1-J3

J1-J3

-20 mA

+20 mA

+20 mA

Low Loss

Isolation

Isolation

+20 mA

-20 mA

+20 mA

Isolation

Low Loss

Isolation

+20 mA

+20 mA

-20 mA

Isolation

Isolation

Low Loss

Truth Table

6. The forward diode voltage drop between:

J8 to J5, J6 or J7 is 1.0 V typical.

J5, J6 or J7 to GND is 0.9 V typical.

C1

C3

C2

C7

C5

L1

L3

L4

J5

J3

J6

J2

J4

J1

C4

C6

J8

J7

L2

Pin Diode 1

Pin Diode 6

Pin Diode 5

Pin Diode 4

Pin Diode 3

Pin Diode 2