R5F101PLAFB datasheet(77/200 Pages) RENESAS

77 / 200 page

RL78/G13

2. ELECTRICAL SPECIFICATIONS (A, D: TA = -40 to +85

°C)

Page 77 of 194

R01DS0131EJ0310 Rev.3.10

Nov 15, 2013

2.4 AC Characteristics

(TA =

−40 to +85°C, 1.6 V ≤ EVDD0 = EVDD1 ≤ VDD ≤ 5.5 V, VSS = EVSS0 = EVSS1 = 0 V)

Items

Symbol

Conditions

MIN.

TYP.

MAX.

Unit

Instruction cycle (minimum

instruction execution time)

TCY

Main

system

clock (fMAIN)

operation

HS (high-

speed main)

mode

2.7 V

≤ VDD≤ 5.5 V 0.03125

μs

2.4 V

≤ VDD< 2.7 V 0.0625

μs

LS (low-speed

main) mode

1.8 V

≤ VDD≤ 5.5 V 0.125

μs

LV (low-

voltage main)

mode

1.6 V

≤ VDD≤ 5.5 V

0.25

μs

Subsystem clock (fSUB)

operation

1.8 V

≤ VDD≤ 5.5 V

28.5

30.5

31.3

μs

In the self

programming

mode

HS (high-

speed main)

mode

2.7 V

≤ VDD≤ 5.5 V 0.03125

μs

2.4 V

≤ VDD< 2.7 V 0.0625

μs

LS (low-speed

main) mode

1.8 V

≤ VDD≤ 5.5 V 0.125

μs

LV (low-

voltage main)

mode

1.8 V

≤ VDD≤ 5.5 V

0.25

μs

External system clock

frequency

fEX

2.7 V

≤ VDD ≤ 5.5 V

1.0

20.0

MHz

2.4 V

≤ VDD < 2.7 V

1.0

16.0

MHz

1.8 V

≤ VDD < 2.4 V

1.0

8.0

MHz

1.6 V

≤ VDD < 1.8 V

1.0

4.0

MHz

fEXS

kHz

External system clock input

high-level width, low-level width

tEXH, tEXL

2.7 V

≤ VDD ≤ 5.5 V

2.4 V

≤ VDD < 2.7 V

1.8 V

≤ VDD < 2.4 V

1.6 V

≤ VDD < 1.8 V

120

tEXHS, tEXLS

13.7

μs

TI00 to TI07, TI10 to TI17 input

high-level width, low-level width

tTIH,

tTIL

1/fMCK+10

Note

TO00 to TO07, TO10 to TO17

output frequency

fTO

HS (high-speed

main) mode

4.0 V

≤ EVDD0 ≤ 5.5 V

MHz

2.7 V

≤ EVDD0 < 4.0 V

MHz

1.8 V

≤ EVDD0 < 2.7 V

MHz

1.6 V

≤ EVDD0 < 1.8 V

MHz

LS (low-speed

main) mode

1.8 V

≤ EVDD0 ≤ 5.5 V

MHz

1.6 V

≤ EVDD0 < 1.8 V

MHz

LV (low-voltage

main) mode

1.6 V

≤ EVDD0 ≤ 5.5 V

MHz

PCLBUZ0, PCLBUZ1 output

frequency

fPCL

HS (high-speed

main) mode

4.0 V

≤ EVDD0 ≤ 5.5 V

MHz

2.7 V

≤ EVDD0 < 4.0 V

MHz

1.8 V

≤ EVDD0 < 2.7 V

MHz

1.6 V

≤ EVDD0 < 1.8 V

MHz

LS (low-speed

main) mode

1.8 V

≤ EVDD0 ≤ 5.5 V

MHz

1.6 V

≤ EVDD0 < 1.8 V

MHz

LV (low-voltage

main) mode

1.8 V

≤ EVDD0 ≤ 5.5 V

MHz

1.6 V

≤ EVDD0 < 1.8 V

MHz

Interrupt input high-level width,

low-level width

tINTH,

tINTL

INTP0

1.6 V

≤ VDD ≤ 5.5 V

μs

INTP1 to INTP11

1.6 V

≤ EVDD0 ≤ 5.5 V

μs

Key interrupt input low-level

width

tKR

KR0 to KR7

1.8 V

≤ EVDD0 ≤ 5.5 V

250

1.6 V

≤ EVDD0 < 1.8 V

μs

RESET low-level width

tRSL

μs

(Note and Remark are listed on the next page.)

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