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DAC8412FPCZ 数据表(PDF) 7 Page - Analog Devices

部件名 DAC8412FPCZ
功能描述  Quad, 12-Bit DAC Voltage Output with Readback
PDF  20 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

DAC8412FPCZ 数据表(HTML) 7 Page - Analog Devices

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Data Sheet
DAC8412/DAC8413
Rev. G | Page 7 of 20
ABSOLUTE MAXIMUM RATINGS
TA = +25°C, unless otherwise noted.
Table 3.
Parameter
Rating
VSS to VDD
−0.3 V, +33.0 V
VSS to VLOGIC
−0.3 V, +33.0 V
VLOGIC to DGND
−0.3 V, +7.0 V
VSS to VREFL
−0.3 V, +VSS − 2.0 V
VREFH to VDD
+2.0 V, +33.0 V
VREFH to VREFL
+2.0 V, VSS − VDD
Current into Any VSS pin
±15 mA
Digital Input Voltage to DGND
−0.3 V, VLOGIC + 0.3 V
Digital Output Voltage to DGND
−0.3 V, +7.0 V
Operating Temperature Range
EP, FP, FPC
−40°C to +85°C
AT, BT, BTC
−55°C to +125°C
Junction Temperature
150°C
Storage Temperature Range
−65°C to +150°C
Power Dissipation Package
1000 mW
Lead Temperature
JEDEC Industry Standard
Soldering
J-STD-020
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
θJA is specified for the worst-case mounting conditions, that is, a
device in socket.
Table 4. Thermal Resistance
Package Type
θJA
θJC
Unit
28-Lead Plastic DIP (PDIP)
48
22
°C/W
28-Terminal Ceramic Leadless Chip Carrier (LLC)
70
28
°C/W
28-Lead Plastic Leaded Chip Carrier (PLLC)
63
25
°C/W
28-Lead Ceramic Dual In-Line Package (CERDIP)
51
9
°C/W
ESD CAUTION



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