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MAT03 数据表(PDF) 2 Page - Analog Devices

部件名 MAT03
功能描述  Low Noise, Matched Dual PNP Transistor
PDF  12 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

MAT03 数据表(HTML) 2 Page - Analog Devices

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MAT03E
MAT03F
Parameter
Symbol
Conditions
Min
Typ
Max
Min
Typ
Max
Unit
Current Gain
1
hFE
VCB = 0 V, –36 V
IC = 1 mA
100
165
80
165
IC = 100
µA
90
150
70
150
IC = 10
µA
80
120
60
120
Current Gain Matching
2
DhFE
IC = 100
µA,VCB = 0 V
0.5
3
0.5
6
%
Offset Voltage
3
VOS
VCB = 0 V, IC = 100
µA
40
100
40
200
µV
Offset Voltage Change
∆V
OS/
∆V
CB
IC = 100
µA
vs. Collector Voltage
VCB1 = 0 V
11
150
11
200
µV
VCB2 = –36 V
11
150
11
200
µV
Offset Voltage Change
∆V
OS/
∆I
C
VCB = 0 V
12
50
12
75
µV
vs. Collector Current
IC1 = 10
µA, IC2 = 1 mA
12
50
12
75
µV
Bulk Resistance
rBE
VCB = 0 V
0.3
0.75
0.3
0.75
Ω
10
µA ≤ I
C
≤ 1 mA
0.3
0.75
0.3
0.75
Ω
Offset Current
IOS
IC = 100
µA, VCB = 0 V
6
35
6
45
nA
Collector-Base
Leakage Current
ICB0
VCB = –36 V = VMAX
50
200
50
400
pA
Noise Voltage Density
4
eN
IC = 1 mA, VCB = 0
fO = 10 Hz
0.8
0.8
nV/
÷Hz
fO = 100 Hz
0.7
0.7
nV/
÷Hz
fO = 1 kHz
0.7
0.7
nV/
÷Hz
fO = 10 kHz
0.7
0.7
nV/
÷Hz
Collector Saturation
Voltage
VCE(SAT)
IC = 1 mA, IB = 100
µA
0.025 0.1
0.025 0.1
V
–2–
REV. C
MAT03–SPECIFICATIONS
ELECTRICAL CHARACTERISTICS (@ T
A = 25 C, unless otherwise noted.)
ELECTRICAL CHARACTERISTICS
MAT03E
MAT03F
Parameter
Symbol
Conditions
Min
Typ
Max
Min
Typ
Max
Unit
Current Gain
hFE
VCB = 0 V, –36 V
IC = 1 mA
70
120
60
120
IC = 100
µA
60
105
50
105
IC = 10
µA
5090
4090
Offset Voltage
VOS
IC = 100
µA, V
CB = 0 V
30
135
30
265
µV
Offset Voltage Drift
5
TCVOS
IC = 100
µA, VCB = 0 V
0.3
0.5
0.3
1.0
µV/°C
Offset Current
IOS
IC = 100
µA, VCB = 0 V
1085
10200
nA
Breakdown Voltage
BVCEO
36
36
V
(@ –40 C
≤ TA ≤ 85 C, unless otherwise noted.)
NOTES
1Current gain is measured at collector-base voltages (V
CB) swept from 0 to VMAX at indicated collector current. Typicals are measured at V CB = 0 V.
2
Current gain matching (
∆h
FE) is defined as:
∆h
FE =
100 (
∆I
B ) hFE ( min )
I
C
.
3Offset voltage is defined as: VOS = VBE1 – VBE2, where VOS is the differential voltage for IC1 = IC2: VOS = VBE1 – VBE2 =
KT
q
In
I
C1
I
C2


.
4Sample tested. Noise tested and specified as equivalent input voltage for each transistor.
5Guaranteed by V
OS test (TCVOS
= V
OS/T for VOS
VBE) where T = 298
°K for T
A = 25
°C.
Specifications subject to change without notice.



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