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IR2131 数据表(PDF) 2 Page - International Rectifier |
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IR2131 数据表(HTML) 2 Page - International Rectifier |
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2 / 8 page ![]() IR2131 B-158 CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL Parameter Value Symbol Definition Min. Max. Units VB1,2,3 High Side Floating Supply Voltage -0.3 525 VS1,2,3 High Side Floating Offset Voltage VB1,2,3 - 25 VB1,2,3 + 0.3 VHO1,2,3 High Side Floating Output Voltage VS1,2,3 - 0.3 VB1,2,3 + 0.3 VCC Low Side and Logic Fixed Supply Voltage -0.3 25 VSS Logic Ground VCC - 25 VCC + 0.3 VLO1,2,3 Low Side Output Voltage -0.3 VCC + 0.3 VIN Logic Input Voltage (HIN1,2,3 ,LIN1,2,3 ,FLT - CLR , SD & ITRIP) VSS - 0.3 VCC + 0.3 VFLT FAULT Output Voltage VSS - 0.3 VCC + 0.3 dVS/dt Allowable Offset Supply Voltage Transient — 50 V/ns PD Package Power Dissipation @ TA ≤ +25°C (28 Lead DIP) — 1.5 (28 Lead SOIC) — 1.6 W (44 Lead PLCC) — 2.0 RθJA Thermal Resistance, Junction to Ambient (28 Lead DIP) — 83 (28 Lead SOIC) — 78 °C/W (44 Lead PLCC) — 63 TJ Junction Temperature — 150 TS Storage Temperature -55 150 °C TL Lead Temperature (Soldering, 10 seconds) — 300 Parameter Value Symbol Definition Min. Max. Units VB1,2,3 High Side Floating Supply Voltage VS1,2,3 + 10 VS1,2,3 + 20 VS1,2,3 High Side Floating Offset Voltage Note 1 600 VHO1,2,3 High Side Floating Output Voltage VS1,2,3 VB1,2,3 VCC Low Side and Logic Fixed Supply Voltage 10 20 VSS Logic Ground -5 5 VLO1,2,3 Low Side Output Voltage 0 VCC VIN Logic Input Voltage (HIN1,2,3 , LIN1,2,3 ,FLT - CLR , SD & ITRIP) VSS VSS + 5 VFLT FAULT Output Voltage VSS VCC TA Ambient Temperature -40 125 °C Absolute Maximum Ratings Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage param- eters are absolute voltages referenced to COM. The Thermal Resistance and Power Dissipation ratings are measured under board mounted and still air conditions. Additional Information is shown in Figures 7 through 10. Note 1: Logic operational for VS of -5V to +600V. Logic state held for VS of -5V to -VBS. Recommended Operating Conditions The Input/Output logic timing diagram is shown in Figure 1. For proper operation the device should be used within the recommended conditions. All voltage parameters are absolute voltages referenced to COM. The VS offset rating is tested with all supplies biased at 15V differential. V V Next Data Sheet Index Previous Datasheet To Order |
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