UPD16640C datasheet(4/16 Pages) NEC

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Data Sheet S11269EJ1V1DS00

µµµµ PD16640C

3. PIN FUNCTIONS

Pin Symbol

Pin Name

Description

S1 to S309

Driver output

Output 64 gray scale analog voltages converted from digital signals.

Osel = H : 300 outputs (S1 - S150, S160 - S309)

Osel = L : 309 outputs (S1 - S309)

Output pins S151 to S159 are invalid in 300-output mode.

D00 to D05

Display data input

Inputs 18-bit-wide display gray scale data (6 bits) x 3 dots (RGB).

D10 to D15

DX0 : LSB, DX5 : MSB

D20 to D25

R,/L

Shift direction select input

This pin inputs/outputs start pulses in cascade mode.

Shift direction of shift register is as follows:

R,/L = H : STHR input, S1

→ S309, STHL output

R,/L = L : STHL input, S309

→ S1, STHR output

STHR

Right shift start pulse I/O

R,/L = H : Inputs start pulse

R,/L = L : Outputs start pulse

STHL

Left shift start pulse I/O

R,/L = H : Outputs start pulse

R,/L = L : Inputs start pulse

Osel

Number of output selection

Selects number of outputs. This pin is internally pulled up by VDD1 power

supply.

Osel = H : 300 outputs

Osel = L : 309 outputs

Vsel

Driver voltage selection

Selects driver voltage. This pin is internally pulled up by VDD2 power supply.

Vsel = H : 300 outputs

Vsel = L : 309 outputs

CLK

Shift clock input

Inputs shift clock to shift register. Display data is loaded to data register at

rising edge of this pin.

When Osel = H, start pulse output goes high at rising edge of 100th clock after

start pulse has been input, and serves as start pulse to driver in next stage.

When Osel = L, start pulse output goes high at rising edge of 103rd clock after

start pulse has been input, and serves as start pulse to driver in next stage.

103rd clock of driver in first stage serves as start pulse of driver in next stage.

STB

Latch input

Contents of data register are latched at rising edge, transferred to D/A

converter, and output as analog voltage corresponding to display data.

Contents of internal shift register are cleared after STB has been input. One

pulse of this signal is input when

µPD16640C is started, and then device

operates normally. For STB input timing, refer to 8. SWITCHING

CHARACTERISTIC WAVEFORM.

V0 to V10

γ-corrected power supply

Inputs

γ-corrected power from external source.

VSS2+0.1 V

≤ V10 ≤ V9 ≤ V8 ≤ V7 ≤ V6 ≤ V5 ≤ V4 ≤ V3 ≤ V2 ≤ V1 ≤ V0 ≤VDD2−0.1 V

VSS2+0.1 V

≤ V0 ≤ V1 ≤ V2 ≤ V3 ≤ V4 ≤ V5 ≤ V6 ≤ V7 ≤ V8 ≤ V9 ≤ V10 ≤VDD2−0.1 V

Maintain gray scale power supply during gray scale voltage output.

INV

Data inversion input

Input data can be inverted when display data is loaded.

INV = H : Inverts and loads input data.

INV = L : Does not invert input data.

VDD1

Logic circuit power supply

3.3 V

± 0.3 V

VDD2

Driver circuit power supply

Vsel = H : VDD2 = 3.3 V

± 0.3 V

Vsel = L : VDD2 = 5.0 V

± 0.5 V

VSS1

Logic ground

Ground

VSS2

Driver ground

Ground

Caution

Be sure to turn on power in the order VDD1, logic input, VDD2, and gray scale power (V0 to V10),

and turn off power in the reverse order, to prevent the

µµµµ PD16640C from being damaged by latchup.

Be sure to observe this power sequence even during a transition period.

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