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AN2149 - APPLICATION NOTE

4/7

If the initial state of the bus-hold circuitry is "High" and the driver is pulling the line LOW, the pull-up

resistors contend with the driver. Then the output driver has to sink enough current to overcome the pull-

up resistor in addition to the hold current of the bus-hold circuit.

In some applications, the bus should become HIGH when all the outputs driving the bus are in tri-state.

This is normally accomplished using a pull-up resistor. As the pull-up resistor value increases, the over

drive current required to toggle the logic state also increases. The driver has to sink/source more current

to power up the bus-hold device that is held LOW initially.

The bus with pull-up can be modeled as an RC circuit with the bus and interconnect capacitance given by

C. The worst case value of a pull-up resistor is calculated using the maximum over-drive current

Figure 4. RC Circuit at Input of Bus Hold Circuitry

mA, the pull-up resistor of the RC circuit should not be more than 3.6 kW .

to a voltage that is high enough to override the bus-hold.

Therefore, the circuit will never transition out of the initial LOW state into the required HIGH state. Having

a high value pull-up resistor also increases the switching time of the device as the RC time constant

increases and the overdrive current sunk/sourced by the bus hold driver is increased. This calculation

holds true when a resistor is pulling a switch or other device up from ground.

This effect is also demonstrated graphically. Figure 5 shows the typical bus-hold characteristics and the

effect of various pull-up resistors on the circuit. The maximum current here is at the most 250

mA. So, as

for calculations done earlier, the pull-up resistor should not exceed 7 or 8 k

W .

For pull-up resistors less than 8 k

W, there is no intersection of the load line with the bus-hold

characteristics. So there is no problem in pulling up an initial low state bus-hold to logic high as required.

For larger resistance values, the load line intersects the bus-hold characteristics and the intersection point

becomes the maximum voltage level up to which the bus hold is pulled up from LOW. The input is never

pulled HIGH beyond this point.

There is a consequent increase in the bus-hold sustaining current to hold the device in the last valid logic

state against the influence of the pull-up resistor, thereby increasing the current consumption.