AN3165

STM32 digital PFC

Doc ID 17180 Rev 1

9/31

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THD between 0.9% and 9% within entire operating range

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Boost topology for DC to DC converter

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Continuous conduction mode for PFC

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Switching frequency of 80 kHz

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Control loop frequency of 40 kHz

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Hardware overcurrent protection (14.3 A)

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Software current limitation (13 A)

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Software overvoltage protection (460 Vdc)

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Software voltage limitation (435 Vdc)

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Regulated DC output voltage with zero load

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Adjustable target value of output DC voltage (by firmware)

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Adjustable proportional and integral parameters for voltage and current (by

firmware)

Figure 1.

Block representation of STM32 digital PFC concept

2.3

System architecture

To perform a digital power factor correction, the MCU of the control stage needs three input

signals.

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Output DC voltage

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Input AC voltage

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Inductor current

From these inputs, the MCU control software modulates the duty cycle of the switching

signal applied to the gate of the MOSFET transistor so that the AC input current is in phase

with the input AC voltage. Moreover, the control strategy keeps the output DC voltage

regulated at a stable value (target output reference voltage).