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AN2353 数据表(PDF) 13 Page - STMicroelectronics

部件名 AN2353
功能描述  Designing an application with the ST10F27x devices
PDF  18 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

AN2353 数据表(HTML) 13 Page - STMicroelectronics

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AN2353
Analog Digital Converter (ADC)
13/18
6
Analog Digital Converter (ADC)
Analog input signal error can be created by poor matching of the source internal resistance
with the ADC input parameters, which can be caused by the following occurences:
Voltage drop in the voltage source resistance due to input leakage current
Poor charging of the ADC internal capacitance (Cin)
Analog input error can also be caused by noise from the analog input signal.
This section describes each of these causes.
Figure 6.
Source internal resistance errors
6.1
Voltage drop in the source resistance
The error generated by the voltage source internal resistance is:
I(OZ1) = specified leakage current.
Refer to the latest product datasheet for the value of I(OZ1).
Note: Input leakage current is caused by parasitic current into the on-chip protection of the
input pin; this protection is necessary to protect the device against ESD (Electrical Static
Discharge) and against overload.
6.2
Poor charging of the ADC internal resistance
During the sample time, the input capacitance (CIO and CIN) must be charged/discharged by
the external source. The internal resistance of the source must allow the capacitance to
reach its final value before the end of sample time.
If this does not happen, that is, if the source resistance is mismatched to the sample time, a
voltage loss occurs at the sample and hold stage. This voltage loss causes an accuracy loss
VS
P5.x
VIN
CIO
RSOURCE
R1
Sample
CIN
AGND
AGND
IOZ1 (Input leakage current Port5): maximum ± 200nA (test condition: 0.45V < VIN <VDD)
CIO (Pin capacitance Port5): maximum 10pF (test condition: f = 1 MHz, TA = 25°C, guaranteed by design characterization)
CIN (ADC internal capacitance): maximum 5pF (guaranteed by design characterization)
R1 (Series input resistance): maximum 1.5k
Ω (guaranteed by design characterization)
IOZ1
Leakage
Current
error LSB
()
R
SOURCE
I
0Z1
()
×
V
AREF
V
AGND
----------------------------------------------
1024
×
=



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