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AN2871 数据表(PDF) 23 Page - STMicroelectronics |
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AN2871 数据表(HTML) 23 Page - STMicroelectronics |
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23 / 25 page ![]() AN2871 Reference reset circuit Doc ID 15304 Rev 3 23/25 6 Reference reset circuit The minimum reset pulse duration is 500 ns as reported in the device datasheet. Figure 9. Reference reset circuit RST VSS VCC MR RESET_B VCC VCC 2.2–10 k FCU FCU[0] FCU[1] Destructive reset Functional sources Fault sources CRPM status SPC560Pxx VSS Bi-Stable Protocol AND Open-drain microprocessor VCC VCC 4.7–10 k 4.7–10 k reset circuit |
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