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AN3959 数据表(PDF) 7 Page - STMicroelectronics |
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AN3959 数据表(HTML) 7 Page - STMicroelectronics |
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7 / 65 page ![]() 1.3 Schematic and block diagrams, bill of material, PCB layout Figure 2. Schematic-1 Line in Line out OUTPUT FILTER STA381BWS C56 NS 100nF 2.0CH & 2.1CH MONO BTL CONFIGURATION NOTE: * R1 0 ohm R3 0 ohm C11 100nF C1 100nF C3 2u2/10V C5 100nF C30 1uF/10V C31 1uF/10V R6 11K R7 11K R8 27K R9 27K C8 1uF/10V C9 1uF/10V C4 1nF C29 100nF C428 470U/35V R36 0ohm R37 470R R38 470R 1 VCC_REG 2 VSS_REG 3 OUT2B 4 GND2 5 VCC2 6 OUT2A 7 OUT1B 8 VCC1 9 GND1 10 OUT1A 11 VDD_REG 12 GND_REG 25 GNDPSUB 26 CPP 27 VDD3V3CHP 28 VDDDIG1 29 GNDDIG1 30 FFX3A 31 FFX3B 32 FFX4A 33 FFX4B 34 VREGFILT 35 AGNDPLL 36 MCLK IC1 STA381BWS J15 J16 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 IC3 STA381BWS_NEW 1 2 3 J19 HPJCKX3.5-06 C32 220nF C36 220nF R10 0R R11 0R C37 NS C38 NS C40 NS C41 NS R30 0R R41 0R C42 220nF C43 220nF L3 SWPA6045S220MT L1 SWPA6045S220MT L2 SWPA6045S220MT L4 SWPA6045S220MT 1 2 3 4 J9 SPEAKJACK2X2 C51 10uF/10V C52 10uF/10V 1 2 3 J2 HPJCKX3.5-06 1 2 3 SW2 1 2 3 SW3 R35 47R R44 47R 1 2 3 4 J7 HEADER2X2 J14 J18 MCLK BICKI LRCKI +3V3 OUT2B OUT2A OUT1B OUT1A +VS FFX4B FFX4A FFX3B FFX3A +3V3 F3XR F3XL RESET OUT1A OUT1B OUT2A OUT2B Note 1: The output filter for the line/HP output path is optional (not required for the STA381BW/S). If the 2x 47 ohm resistors (R35 and R44) are bypassed through J14 and J18, the 2x 100 nF capacitors (C54 and C55) must also be removed. Note 2: C56 is not soldered when the STA381BW/S is configured in 2.0 or 2.1 channels; C56 is 100 nF when the STA381BW/S is configured in mono BTL. Refer to the schematic in Appendix A on page 63 for an example of a mono BTL application. |
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