AN4189

Design guidelines for PCB schematic and layout

Doc ID 023809 Rev 1

9/23

3

Design guidelines for PCB schematic and layout

3.1

Schematic

3.1.1

General

●

Absolute maximum rating: 20 V

●

Bypass capacitor 100 nF in parallel to 1 µF for each power Vcc branch. Preferable

dielectric is X7R.

●

Vdd and ground for the PLL filter are separated from the other power supply

●

Coil saturation current compatible with the peak current of the application

3.1.2

Decoupling capacitors

There are two different ways to utilize these as follows:

●

The decoupling capacitor(s) can be shared among channels; the "star route" for the PC

board layout must be used.

●

The decoupling capacitor(s) can be used as one decoupling system per channel; the

decoupling capacitor must be placed as close as possible to the IC pins.

3.1.3

Output filter

The IC output circuit contains three filters: a snubber, a damping network, and a main filter.

Figure 8.

Output filter

1.

The key function of a snubber network is to absorb energy from the reactance in the

power circuit. The purpose of the snubber RC network is to avoid unnecessary high

pulse energy such as a spike in the power circuit which is dangerous to the system.

2.

The purpose of the main filter is to attenuate frequencies higher than the audible range

of 20 kHz. The main filter is designed using the Butterworth formula to define the cutoff

C98

470 n

C105

100 n

C101

100 n

C95

100 n

C89

100 n

C90

330 p

C99

100 0p

C103

100 0p

L13

22u

L11

22u

C91

100 0p

R37

6.2

R34

6.2

R36

20

INxA

INxB

1

2

J7

CON2

SNUBBER

Main Filter

Damping Network