AN2421 datasheet(5/6 Pages) STMICROELECTRONICS

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AN2421

Performance

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Performance

To ensure minimum I2C activity, with 20-ms scanning interval (50 scan cycles per second)

for an 8*8 keypad matrix, 400 I2C transactions are required per second with each

transaction writing to one single register in STMPE801 for driving the respective column low

and reading the BB_GPIO status.

Assuming the transaction length is approximately 40-bit time (I2C address with ACK,

per second is:

Equation 1

The I2C interface has a bandwidth of 400Kbit/s, so the keypad controller uses only 16/400

(4%) of the I2C bandwidth.

There are no interrupts from STMPE801 to the Baseband.

Enhancements

It is possible to further enhance keypad controller performance using the following

recommendations:

In Idle state,

–

Baseband goes into hibernation

–

STMPE801 GPIOs are configured to inputs with interrupt enabled

If any keys are pressed, the STMPE801 sends an interrupt to wake up the Baseband and

start the scanning operation (STMPE801 reverts to operating as output). This enables the

system to enter Deep Hibernation mode and still detect key presses.

This enhancement also further reduces I2C bandwidth requirements as a scanning

operation occurs if and only if a key is pressed.

Revision history

400

16.000

•

bit time

Table 1.

Document revision history

Date

Revision

Changes

20-Nov-2006

Initial release.

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