UM0546

Evaluation board description

Doc ID 14680 Rev 2

13/18

2.2.4

Oscillator block

To obtain clock at 250 kHz frequency, has been used an oscillator to 1 MHz and a counter

(for frequency division). In this way is possible obtain the 250 kHz needed fot L9352B, from

different oscillator. Otherwise, is possible connect the CLK line with line caming from µC.

The following table describes the pin out of connectors J20, J21 and J22:

Table 4.

Valve connectors J17, J18 and J19

Name

Figure

Description

J18 Pin 1

Figure 10.

Status Q1 of L9352B driver

J18 Pin 2

Status Q2 of L9352B driver

J18 Pin 3

Status Q3 of L9352B driver

J18 Pin 4

Status Q4 of L9352B driver

J19 Pin 1

Input Q1 of L9352B driver

J19 Pin 2

Input Q2 of L9352B driver

J19 Pin 3

Input Q3 of L9352B driver

J19 Pin 4

Input Q4 of L9352B driver

J17 Pin 1

Output Q1 of L9352B driver

J17 Pin 2

Output Q2 of L9352B driver

J17 Pin 3

Output Q3 of L9352B driver

J17 Pin 4

Output Q4 of L9352B driver

Figure 11.

Oscillator and clock selector

2

4

6

8

10

12

14

16

18

20

22

24

26

1

3

5

7

9

11

13

15

17

19

21

23

25

J21

CLK Selector

J22

JUMPER_2

C18

100n

0

CLK

10

QA

9

QB

7

QC

6

QD

5

QE

3

QF

2

QG

4

QH

13

QI

12

QJ

14

QK

15

QL

1

U1

74HC4040

0

V5

CLK

VDD_5

14

OUT

8

GND

7

E/D

1

Y1

1 MHz - OSCILLATOR

V5

CLK_uC

1

2

J20

JUMPER_2

0