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UM1556 数据表(PDF) 13 Page - STMicroelectronics |
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UM1556 数据表(HTML) 13 Page - STMicroelectronics |
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13 / 87 page  UM1556 General items Doc ID 023520 Rev 2 13/87 Figure 7. Positive ISO pulse The most severe negative ISO pulse to consider is test pulse 1 at level IV (-100 V@2 ms). This pulse is directly transferred to the GND pin. The maximum peak reverse voltage of the diode should therefore be at least 100 V. Note: The diode works in avalanche mode if pulse level is above the rated reverse voltage. Figure 8. Negative ISO pulse Note: As seen from the above explanation, the HSD with diode protection in the GND pin doesn’t clamp negative ISO pulses at supply line. Therefore an appropriate serial protection resistor should be used between the µC and HSD.The resistor value should be calculated according to maximum injected current to the I/O pin of the used microcontroller. Note: Diode parameters can be lower if an external clamping circuitry is used (e.g. HSD module is supplied from a protected power supply line). |
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