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UPD17145CT 数据表(PDF) 45 Page - NEC |
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UPD17145CT 数据表(HTML) 45 Page - NEC |
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45 / 102 page ![]() 45 µPD17145(A1), 17147(A1), 17149(A1) 14. A/D CONVERTER The µPD17149(A1) is provided with an A/D converter with 4 analog input channels (P0C0/ADC0-P0C3/ADC3) and a resolution of 8 bits. This A/D converter is of the successive approximation type and operates in the following two modes: 1 Successive mode in which 8-bit A/D conversion is sequentially performed starting from the most significant bit 2 Single mode in which an input analog voltage is compared with the set value of an 8-bit data register 14.1 Configuration of A/D Converter Figure 14-1 shows the configuration of the A/D converter. Figure 14-1. Block Diagram of A/D Converter Note The 8-bit data register (ADCR) is cleared to 00H when the STOP instruction is executed. Internal bus Read signal P0Cn/ADCn RF: 22H RF: 20H RF: 21H 0 0 ADCCH1 ADCCH0 0 0 0 ADCSTRT ADCSOFT 0 ADCCMP ADCEND Control circuit Comparator Selector Tap decoder 8-bit data register Note (ADCR) 8 8 D/A converter R/2 R R 3R/2 Remark n = 0 to 3 Output latch 4 Selector P0CnIDI P0CBIOn P0F1 input data A/D end signal STOP instruction signal P0F1/VREF P0CnIDI 4 |
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