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AN3299 数据表(PDF) 5 Page - STMicroelectronics |
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AN3299 数据表(HTML) 5 Page - STMicroelectronics |
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5 / 13 page ![]() AN3299 Hardware Doc ID 18113 Rev 1 5/13 1.1.2 Reset pin recommendation The following is a few examples of configurations at the reset pin. ● If a reset delay is desired (recommended) upon power up, an RC delay can be connected to the reset as shown below. Figure 2. RSTB connectivity recommendation 1 ● If external reset assertion is required through CPU/baseband, RSTB can be connected to the GPIO. The diagram below shows the presence of a weak pull-up resistor assuming CPU/baseband control is open drain. The minimum pulse width of the external reset signal is 100 µs. Figure 3. RSTB connectivity recommendation 2 ● If reset delay and external reset assertion, as shown in case1 and case2 above, are not required, it is recommended to short the reset pin to VCC through a low resistor of 0.1 Ω - 100 Ω. AM08426v1 Reset VCC 1.65 V – 3.6 V STMPE801 CPU control 10 k VCC CPU control Ω |
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