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AN4129 数据表(PDF) 13 Page - STMicroelectronics |
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AN4129 数据表(HTML) 13 Page - STMicroelectronics |
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13 / 39 page ![]() AN4129 Power converter performance Doc ID 023314 Rev 1 13/39 3.4 Addition of diode clamp to limit input current Since the peak FET current is directly controlled by the voltage on the ILED pin, a diode clamp can be added to limit the voltage increase to reasonable levels. The graph below shows the results for two diode types, a fast P-N diode having about 0.6 V forward drop, and a Schottky diode having about 0.3 V forward drop, placed across the DC filter capacitor. Figure 15. Power loss vs. sinusoidal input voltage The input current increase can now be limited to a reasonable value. There are two consequences of this addition: ● Line regulation is lost at low input voltages (the ILED pin cannot rise to regulate current). Figure 16. Output current vs. input voltage ● And THD is significantly improved at low input voltage: Figure 17. THD vs. input voltage |
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