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AN880 数据表(PDF) 9 Page - STMicroelectronics |
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AN880 数据表(HTML) 9 Page - STMicroelectronics |
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9 / 14 page ![]() line voltage VDC is applied when the oscillator starts. The ballast has to start directly with its nominal conditions to remove any transient oscil- lation. Hence the operation runs in ZVS mode with no spurious lamp ignition. This situation does not occur with the saturable transformer drive, be- cause the saturation limits naturally the current by increasing the frequency. In the example the resonant capacitors are pre- set to be compatible with the choke current rise (see figure 19). The blocking capacitor is pre- charged to approximately half VDC by 2 biasing resistors, and the lower Mosfet also discharges the resonant capacitor to ground (see figure 20). Therefore the blocking capacitor never goes above 2/3 of the line voltage VDC (250V rating), the operation is safe in ZVS mode. The L6569 is here preferred to the L6569A, because the lower Mosfet is on at power-up. The lamp removal protection Used in TL ballast, the lamp removal protection is frequently also requested in the "plug-in" CFL bal- last . Depending of the topology and the preheat mode, the lamp removal behaves as: - a noload resonant mode when the choke and the capacitor are still connected to the in- verter ; a required overcurrent protection in- creases the frequency to reduce the current; - an open circuit mode when the lamp filaments are inserted in the resonant circuit. When the circuit is open, the choke is not sup- plied. The MOSFETs turn off slowly generating bridge cross conduction, and undesirable dissipa- tion losses (see figure 21). The detection stops the switching to eliminate the cross conduction. 5 µs/dv ; 50 V/dv ; 0.5 A/dv GND GND I I VB VBI IDEAL INITIAL TIME Figure 19: Waveforms of the choke current and the capacitor voltages in steady state preheat. I I VB VBI 100 nF 4nF ON L6569 VS<UVLO 2.4 mH 2 x 180 k Ω Figure 20: Configuration of the resonant network during the initialization of the driver. 100 ns/dv ; 50 V/dv ; 5V/dv ; 1 A/dv GND VD GND GND VGS ID ID= 2 A peak Figure 21: Drain current and voltage STP8NA50 MOSFET operating with noload. AN880 APPLICATION NOTE 9/14 |
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