AN2579

Register description

9/15

I2CFG2

I2CFG1

I2CFG0

Data signal on Int2 pad control bits. Default value 000.

(see table below)

I1CFG2

I1CFG1

I1CFG0

Data signal on Int1 pad control bits. Default value 000.

(see table below)

Table 15.

Truth table

I1(2)_CFG2

I1(2)_CFG1

I1(2)_CFG0

Int1(2) Pad

0

0

0

GND

001

FF_WU_1

010

FF_WU_2

0

1

1

FF_WU_1 or FF_WU_2

100

Data ready

1

1

1

Click interrupt

Table 14.

Description (continued)