AN2960 datasheet(21/41 Pages) STMICROELECTRONICS

部件名	AN2960

功能描述	ultra compact linear accelerometer

PDF	41 Pages

Scroll/Zoom	100%

制造商	STMICROELECTRONICS [STMicroelectronics]

网页	http://www.st.com

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21 / 41 page

AN2960

About control registers

Doc ID 15557 Rev 1

21/41

Figure 10 shows the block diagram of the digital processing chain and the related control

signals.

Figure 10.

Digital processing chain block diagram

6.3

CTRL_REG3 (22h)

Control register #3.

HP Filter

Interrupt Generator

(FF_WU 1)

CTRL_REG2(HP FF_WU1)

CTRL_REG3(FDS)

Regs Array

Digital Processing Chain

HP_FILTER_RESET

Interrupt Generator

(FF_WU 2)

CTRL_REG2(HP FF_WU2)

Offset

Output regs

SRC reg 1

SRC reg 2

Adjustment

Block

IHL

PP_OD

I2CFG2

I2CFG1

I2CFG0

I1CFG2

I1CFG1

I1CFG0

IHL

Interrupt active high, low. Default value 0.

(0: active high; 1: active low)

PP_OD

Push-pull/open drain selection on interrupt pad. Default value 0.

(0: push-pull; 1: open drain)

I2CFG2,

I2CFG0

Interrupt 2 configuration bits. Default value 000.

(see table below)

I1CFG2,

I1CFG0

Interrupt 1 configuration bits. Default value 000.

(see table below)

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