Harvesting module layout

AN4396

10/19

DocID025514 Rev 1

In order to ensure a proper noise rejection that could impact the SPV1050 device

performance, the following indications must be followed in the PCB routing:



The exposed pad and the pins PGND and GND must be connected to the same ground

plane.



The capacitor on the STORE pin must be placed as closest as possible to the related

pin.



The capacitors on the LDO1 and LDO2 pins must be placed as closest as possible to

the related pins.