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AN4043 数据表(PDF) 21 Page - STMicroelectronics |
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AN4043 数据表(HTML) 21 Page - STMicroelectronics |
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21 / 60 page ![]() AN4043 Electrical characteristics and functions Doc ID 022726 Rev 2 21/60 Note: X: not important. The dead time is internally set at 180 ns as typical value. In Figure 13 the details of dead time and interlocking function management of the STGIPN3H60 is described. Table 8. Interlocking function truth table of the STGIPN3H60 Condition Logic input (VI) Outputs SD LIN HIN LVG HVG Shutdown enable half bridge tri-state LX X L L Interlocking half bridge tri-state HL HL L 0 “logic state” half bridge tri-state HH L L L 1 “logic state” low-side direct driving HL L H L 1 “logic state” high-side direct driving HH H L H |
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