DocID026335 Rev 1

9/16

UM1763

Example II

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Example II

In order to guide you step by step to a more realistic application, we extended the first

example by introducing the use of the system timer and the ADC peripherals in the second

example.

The system timer (STMR) consists of a 16-bit autoreload upcounter driven by

a programmable prescaler. Specific APIs have been created and integrated in the

stlux_stmr library to configure and pilot this timer. Here it is used as a time base to generate

data sampling at a given frequency. The timer clock is prescaled by 4 and an interrupt is

raised each time 200 tics the period event and therefore input data are sampled through the

ADC at a 20 KHz frequency .

The ADC is a 10 bit successive approximation analog-to-digital converter. In this example

four of the possible eight channels (channel 0 to channel 3) are used to sample input data

amplified by a 1.0 gain factor (the other possible value is 4.0). The ADC clock is set to

6 MHz frequency.

The main code properly initializes all the peripherals and clocks and then starts the system

timer and the ADC sampling. It tests the x0 input variable and when it becomes greater then

a given threshold, it starts the SMED 0.

Figure 2. Example 02 application scheme