13

LT1640L/LT1640H

1640lhfb

Figure 13. Using PWRGD to Drive an Optoisolator

LT1640L

PWRGD

SENSE

C1

150nF

25V

C3

100

µF

100V

Q1

IRF530

R2

10

Ω

5%

R7

51k

5%

R3

18k

5%

C2

3.3nF

100V

R4

562k

1%

R5

9.09k

1%

R6

10k

1%

R1

0.02

Ω

5%

4

3

2

OV

GND

– 48V

UV

56

8

7

1

MOC207

GATE

DRAIN

1640 F13

PWRGD

+

GND

(SHORT PIN)

*

1N4148

* DIODES INC. SMAT70A

4

3

2

1

+

LT1640L

SENSE

C1

C3

Q1

R2

R3

C2

R4

R5

R6

R1

4

3

2

OV

GND

GND

– 48V

UV

56

8

1

7

GATE

ACTIVE LOW

ENABLE MODULE

+

–

+

1640 F12

–

PWRGD

DRAIN

ON/OFF

–

+

(SHORT PIN)

*

* DIODES INC. SMAT70A

1N4148

4

3

2

1

+

–

Q2

Figure 12. Active Low Enable Module

When the DRAIN voltage of the LT1640L is high with

and the PWRGD pin is in a high impedance state (Fig-

ure 12). The PWRGD pin will be pulled high by the module’s

internal pull-up current source, turning the module off.

and the PWRGD pin will pull low, enabling the module.

The PWRGD signal can also be used to turn on an LED or

optoisolator to indicate that the power is good as shown

in Figure 13.

Gate Pin Voltage Regulation

When the supply voltage to the chip is more than 15.5V,

supply voltage is less than 15.5V, the GATE voltage will be

about 2V below the supply voltage. At the minimum 10V

supply voltage, the gate voltage is guaranteed to be greater

than 6V. The gate voltage will be no greater than 18V for

supply voltages up to 80V.