AN591

Input capture with ST62 auto-reload timer

3/5

Programmable example

The following figure shows the evolution of the contents of TC and RC during capture

operation: a rising edge on TIMIN results in copying the latest value of TC into RC, and

clearing TC. Afterwards, TC increments at the selected clock rate until the next capture or

until it reaches 255. In the latter case, it wraps to 0. In capture mode, TC always counts from

0 to 255, it is never loaded from the RC register.

Figure 2.

TC and RC Evolution

;**************** accumulator *****************************

A

.def 0FFh,0FFh,0FFh ;Accumulator

;**************** RAM variable ****************************

period .def 084h,0FFh,0FFh ;elapsed time

;**************** A-R Timer Register Set ******************

RC. def 0D9h,0FFh,0FFh ;reload/capture register

CP. def 0DAh,0FFh,0FFh ;compare register

MC. def 0D5h,0FFh,0FFh ;mode control register

SC0. def 0D6h,0FFh,0FFh ;status/control register 0

SC1. def 0D7h,0FFh,0FFh ;status/control register 1

LR. def 0DBh,0FFh,0FFh ;load register

;==========================================================

ldi SC1,01000100b; clock source = CPU,

;prescaler ratio = 4,

;pull-up on TIMIN disabled,

;capture on rising edge of TIMIN

ldi MC, 11000010b;capture with reset, ints. disabled

;PWMOUT disabled, start timer

; .

; . normal program

; .

;now we want to know the elapsed time between last and

;next edge on TIMIN:

res 2, SC0 ;clear external event flag

wt_edge

jrr 2,SC0,wt_edge ;wait for edge on TIMIN, then

ld A,RC ;read elapsed time from reload/capt

ld period,A ;register into variable ”period”