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ST7 KEYPAD DECODING TECHNIQUES, IMPLEMENTING WAKE-UP ON KEYSTROKE

2 ST72F264 CONFIGURATION

The application has been validated with a ST72F264. Its configuration is described in this part.

Refer to your datasheet for more details.

2.1 I/O CONTROL

Rows are connected to pins configured as inputs (Port C as input with pull up and interrupts).

Columns are connected to pins configured as outputs (Port A).

External interrupts are caused by a low level applied to a pin of Port C (caused by a key

pressed), they wake up the MCU which was in HALT mode.

Port B is configured as outputs to send the value of the pressed key on LEDS.

Please, refer to the Data Book to configure pins properly.

2.2 MISCELLANEOUS REGISTER

Bits 7 and 6 have to be set to configure events correctly: the external interrupt (EI1) has here

to be caused by a falling edge only.

Please, refer to the datasheet for more details.

2.3 HALT MODE

The HALT instruction places the ST72F264 in its lowest power consumption mode. The core

and all peripherals are frozen. In this mode, the internal oscillator is turned off, causing all in-

ternal processing to be halted. The data remain unchanged. During the HALT mode, external

interrupts are still enabled. The MCU stays in this state until an external interrupt or a reset oc-

curs. Then the internal oscillator is restarted and the core waits for 4096 CPU clock cycles

comes back to the main program (in our application to the HALT state).

Please, refer to the datasheet for more details.