UPD63 datasheet(3/68 Pages) NEC

3 / 68 page

µPD63, 63A, 64

BLOCK DIAGRAM

KI0-KI3

KI/O0-KI/O7

S0, S1/LED

PORT KI

PORT KI/O

PORT S

ROM

RAM

SYSTEM

CONTROL

CARRIER

GENERATOR

9-bit

TIMER

CPU

CORE

RESET

XIN

XOUT

VDD

GND

REM

S1/LED

LIST OF FUNCTIONS

Item

µPD63

µPD63A

µPD64

µPD6P4B

ROM capacity

512

× 10 bits

768

× 10 bits

1002

× 10 bits

1002

× 10 bits

Mask ROM

One-time PROM

RAM capacity

× 4 bits

Stack

1 level (multiplexed with RF of RAM)

I/O pins

• Key input (KI): 4

• Key I/O (KI/O): 8

• Key extended input (S0, S1): 2

• Remote control transmission display output (LED) : 1 (multiplexed with S1 pin)

Number of keys

• 32 keys

• 48 keys (when extended by key extension input)

• 96 keys (when extended by key extension input and diode)

Clock frequency

Ceramic oscillation

•fX = 2.4 to 8 MHz

•fX = 2.4 to 4 MHz

Instruction execution time

µs (fX = 8 MHz)

Carrier frequency

fX/8, fX/16, fX/64, fX/96, fX/128, fX/192, no carrier (high level)

Timer

9-bit programmable timer: 1 channel

POC circuit

Mask option

Internal

Supply voltage

• VDD = 1.8 to 3.6 V

VDD = 2.2 to 3.6 V

•VDD = 2.2 to 3.6 V (with POC circuit)

(fX = 2.4 to 4 MHz)

VDD = 2.7 to 3.6 V

(fX = 4 to 8 MHz)

Operating ambient temperature

• TA = –40 to +85

°C

•TA = –20 to +70

°C (with POC circuit)

Package

• 20-pin plastic SOP (300 mil)

• 20-pin plastic

SOP (300 mil)

• 20-pin plastic

SSOP (300 mil)

UPD63 数据表(PDF) 3 Page - NEC

UPD63 数据表(HTML) 3 Page - NEC

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UPD63 数据表(PDF) 3 Page - NEC

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