DocID9986 Rev 2

9/22

AN1753

UART implementation

4

UART implementation

4.1

Baud rate definition

The Autoreload timer is used to generate the baud rate. The autoreload timer clock

(fCOUNTER) is the same as the fcpu clock, which is an 8 MHz internal clock.

The example below describes how this baud is generated:

- baudrate = 2400

- fcpu = 8MHz (so clock period is 125 ns)

- In the application fCOUNTER = fcpu

So to get 2400 baud the “Prescaler” required is,

Prescaler = fcpu / baud

Prescaler = 8 * 10

= 0.0033333333 * 10

6

= 3333.33 decimal

= D05 Hex (= 1 bit delay count)

So in software DCRx will be

DCR0H = 0D + CNTRH

DCR0L = 05 + CNTRL

to generate one bit delay when 2400 baud is required

For half bit period “Prescaler” is,

Prescaler = one bit / 2

= 1666.66 (decimal)

= 682 Hex (= 1/2 bit delay)

DCR0H = 06 + CNTRH

DCR0L = 82 + CNTRL

The software provided with this application note has been functionally tested in the range

2400 to 19200 baud.

4.2

Majority-voting system

Compared to the transmit section, the receive section is complex. Thus, to avoid possible

errors in detecting the exact bit status because of line noise, etc., this program uses a

majority-voting system. When the ST7LITE0 is in receive mode, it reads (samples) each bit

three times in the middle of the bit time. To determine its exact state, it compares the

number of 1’s with the number of 0’s. If there are more ‘1‘s than ‘0‘s, the bit received is a ‘1‘,

else it is a ‘0‘. (see Figure 3)

Figure 3. Majority-voting system

This section is only used for the receive part. You can change it to suit your requirements.

012

3

4

5

67

1st sample

2nd sample

3rd sample

START

STOP