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IMPLEMENTATION OF SIGMA-DELTA ADC WITH ST7FLITE05/09

Send_rs:

bres FLAGS0,#m50us

; procedure of RS data byte sending

call wait

; 19200bps,1b start,1b stop,8b data

bres PADR,#RS

; setting of a start bit

call wait

ld x,#$08

loop_snd:

rrc a

call Send_bt

; setting of 8 data bits

dec x

jrne loop_snd

bset PADR,#RS

; setting of a stop bit

jra wait

Send_bt:

jrc sd_H

; setting of a data bit at the port

bres PADR,#RS

jra wait

sd_H:

bset PADR,#RS

wait:

btjf FLAGS0,#m50us,wait ; latency for the duration of the

; data bit

bres FLAGS0,#m50us

ret

;**********************************************************************

;Interrupt vectors segment 'vectit'

;**********************************************************************

DC.W

dummy

; FFE0-FFF1h location

spi_it

DC.W

spi_rt

; FFE2-FFE3h location

lttimrtc_it

DC.W

lttimrtc_rt

; FFE4-FFE5h location

ltimoutcmp_it

DC.W

ltimoutcmp_rt

; FFE6-FFE7h location

timoverfl_it

DC.W

timoverfl_rt

; FFE8-FFE9h location

timoutcmp_it

DC.W

timoutcmp_rt

; FFEA-FFEBh location

lvd_it

DC.W

lvd_rt

; FFEC-FFEDh location

DC.W

dummy

; FFEE-FFEFh location

DC.W

dummy

; FFF0-FFF1h location

ext3_it

DC.W

ext3_rt

; FFF2-FFF3h location

ext2_it

DC.W

ext2_rt

; FFF4-FFF5h location

ext1_it

DC.W

ext1_rt

; FFF6-FFF7h location

ext0_it

DC.W

ext0_rt

; FFF8-FFF9h location

DC.W

dummy

; FFFA-FFFBh location

softit

DC.W

sw_rt

; FFFC-FFFDh location

reset

DC.W

INIT

; FFFE-FFFFh location

end