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Implementation using ST7FMC

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Implementation using ST7FMC

A typical schematic block diagram of ST7FMC based sensorless control of BLDC motor [2]

is shown in Figure 7. Refer to Appendix C on page 16 for a complete schematic of the

experimental hardware. This schematic resembles the motor control starter kit schematic

from Softec Microsystems, with matching I/O assignments wherever possible.

Figure 7.

Schematic block diagram of ST7FMC based sensorless control of BLDC

motor

Figure 8a shows the PWM carrier configured in center aligned mode, where the counter

counts up to a maximum value (as defined by MCP0) and starts counting down to zero and

repeats this cycle again. (See Appendix A for information on setting the PWM frequency).

The PWM generator is set to generate a duty cycle update interrupt (U event) upon

completion of every N carrier cycles as specified by MREP register. (See Appendix A for

information on setting the periodicity of this interrupt). The timing of the U event or interrupt

are generated as shown in Figure 8b. Due to the application of PWM voltage on motor

BLDC

MCO0

MCO1

MCO2

MCO3

MCO4

MCO5

AINx

PE0

PE1

PE2

MCIA

MCIB

MCIC

Shut Down

Speed Ref

AINy

Max Current

ST7FMC

Limit