AN2389

Theory of operation

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Figure 2.

Timing diagram for two PWM signals

Figure 2 shows a timing example for the two PWM signals based on the above guidelines.

Here phase 2 does not occur.

–

If the duty cycles of the two PWM signals driving SW1(PWM1) and SW2 (PWM2)

are D1 and D2 respectively and

–

if we exclude the saturation voltage of the switches from our calculation and

–

–

then the output voltage Vout is given by the following formula:

As mentioned in [2], theoretically this converter works linearly over a gain range of 0 - 200%

of the input voltage.

PWM1

PWM2

Phase 1

Phase 4

Phase 3