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AN2476 数据表(PDF) 5 Page - STMicroelectronics |
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AN2476 数据表(HTML) 5 Page - STMicroelectronics |
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5 / 49 page ![]() AN2476 Power supply and clocks 5/49 1.3 Power supply schemes 1.3.1 Power scheme 1: single external 3.3V power source In this configuration, the internal voltage regulators are switched on by forcing the VREG_DIS pin to low level. The VCORE supply required for the kernel logic and the VBACKUP supply required for the backup circuitry are generated internally by the Main Voltage Regulator or the Low Power Voltage Regulator (depending on the selected low power mode). This scheme has the advantage of requiring only one power source. Refer to Figure 1 on page 5. At power-up and during NORMAL mode (all operating modes except STOP and STANDBY Modes): ● The Main Voltage Regulator powers both VCORE supply required for the kernel logic and the VBACKUP supply required for the backup circuitry. ● The Low Power Regulator is not used Figure 1. Power supply scheme 1 (single 3.3V supply VREGDIS=0) in NORMAL mode 3.3V MAIN VOLTAGE GP I/Os OUT ADC ADCIN KERNEL LOGIC BACKUP IN V18_BKP (CPU & DIGITAL & +/-0.3V VIO=3.3V VDD_ADC VSS_ADC PLL 3.3V 3.3V VSS_PLL VSS_IO VDD_IO V18REG VDD_PLL VSS18 VSS_BKP OSC32K, RTC REGULATOR MEMORIES) CIRCUITRY WAKEUP LOGIC, VREG_DIS BACKUP REGISTERS) I/O LOGIC IN STANDBY MODE THIS BLOCK IS KEPT POWERED ON NORMAL POWER SWITCH MODE V18 10µF 33nF 1µF 1µF LOW POWER VOLTAGE REGULATOR VBACKUP VCORE V18 VLPVREG ~1.4V VMVREG = 1.8V VSS18 |
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