LTC1453_15 datasheet(6/12 Pages) LINER

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LTC1451

LTC1452/LTC1453

sn145123 145123fas

GND: Ground.

REF: The Output of the Internal Reference and the Input

to the DAC Resistor Ladder. An external reference with

voltage up to VCC/2 may be used for the LTC1452.

VOUT: The Buffered DAC Output.

VCC: The Positive Supply Input. 4.5V ≤ VCC ≤ 5.5V

(LTC1451), 2.7

≤ VCC ≤ 5.5V (LTC1452/LTC1453). Re-

quires a bypass capacitor to ground.

CLK: The TTL Level Input for the Serial Interface Clock.

DIN: The TTL Level Input for the Serial Interface Data. Data

on the DIN pin is latched into the shift register on the rising

edge of the serial clock.

CS/LD: The TTL Level Input for the Serial Interface Enable

and Load Control. When CS/LD is low the CLK signal is

enabled, so the data can be clocked in. When CS/LD is

pulled high, data is loaded from the shift register into the

DAC register, updating the DAC output.

DOUT: The Output of the Shift Register which Becomes

Valid on the Rising Edge of the Serial Clock.

B11

MSB

B10

LSB

B11

CURRENT WORD

CLK

DIN

DOUT

CS/LD

1451/2/3 TD

PREVIOUS WORD

B11

PREVIOUS WORD

B10

DAC

–

REFERENCE

LTC1451: 2.048V

LTC1453: 1.22V

12-BIT

SHIFT

POWER-ON

RESET

11451/2/3 BD

CLK 1

DIN 2

DOUT 4

VOUT

REF

GND

VCC

CS/LD

12-BIT DAC

PI FU CTIO S

BLOCK DIAGRA

TI I G DIAGRA

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