| 数据搜索系统,热门电子元器件搜索 |
|
AN3133 数据表(PDF) 13 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
AN3133 数据表(HTML) 13 Page - STMicroelectronics |
|
13 / 43 page ![]() AN3133 Real-time clock overview Doc ID 16956 Rev 5 13/43 The RTC remains active in Low Power Run, Low Power Wait and Active-halt mode only if the clock source is LSI or LSE. If the RTC clock is HSI or HSE, and the HALT instruction is executed, the RTC is stopped (since the HSI and HSE clocks are stopped in Halt mode) and cannot wake up the device. Refer to the low power modes section of the STM8L05xx, STM8L15xx, STM8L162x, STM8AL31xx and STM8AL3Lxx microcontroller family reference manual (RM0031) for more details about low power modes. 1.7 Signals generated by RTC The RTC peripheral has 2 outputs: ● RTC_CALIB: it can be used to generate an external clock. ● RTC_ALARM: unique output resulting from the multiplexing of the RTC alarm and wakeup events. 1.7.1 RTC_CALIB output The RTC_CALIB output is used to generate a variable-frequency signal. Depending on the user application, this signal can play the role of a reference clock to calibrate an external device, or be connected to a buzzer to generate a sound. The signal frequency is configured through the 6 LSB bits (PREDIV_A [5:0]) of the Asynchronous prescaler register, RTC_APRER. When COSEL=0 (512Hz output), RTC_CALIB is the output of the 5th stage of the 6-bit asynchronous prescaler. So if PREDIV_A[5]=0, no signal is output on RTC_CALIB. When RTCCLK frequency is 32.768kHz and PREDIV_A[6:0] = 0x7F, RTC_CALIB frequency is 512Hz. When COSEL=1(1Hz output). RTC_CALIB is the output of the 8th stage of the 15-bit synchronous prescaler. So if PREDIV_A[6:0] = 0x7F and PREDIV_S[15:0] = 0xFF, RTC_CALIB frequency is 1Hz. Table 3. Low power modes where RTC is actor Mode Entry Oscillator CPU Peripherals status wake up Wait mode WFI/WFE(1) 1. There is no event associated to the RTC. As a consequence, the interrupt is served both in WFE and WFI modes. ON ON ON Internal or external event, reset Low power run mode Software sequence LSI or LSE clock ON ON Software sequence, reset Low power wait mode Software sequence + WFE LSI or LSE clock OFF ON Internal or external event, reset Active-halt mode HALT(2) 2. Before executing the HALT instruction, the application must clear all pending peripheral interrupts by clearing the corresponding interrupt bit in the peripheral configuration register. Otherwise, the HALT instruction is not executed and program execution continues. Off except LSI or LSE clock OFF OFF except RTC and possibly LCD External interrupts, RTC interrupt, reset |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |