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AN3261 数据表(PDF) 7 Page - STMicroelectronics |
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AN3261 数据表(HTML) 7 Page - STMicroelectronics |
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7 / 17 page ![]() AN3261 Typical application diagrams Doc ID 17837 Rev 1 7/17 2.2 Dual-button reset The most frequent application requires a configuration with two reset buttons which further improves immunity to undesired resets by adding a second input reset button with delayed reset. In this case, the reset pulse occurs only when both the buttons have been pressed and held for the defined tSRC delay. Figure 3. Dual push-button Smart Reset™ typical application diagram, STM6503 Figure 4. Timing diagram - dual push-button Smart Reset™ VCC SR0 SR1 TSR RST VSS VCC INT/ NMI VSS PUSH-BUTTON SWITCH MCU PUSH-BUTTON SWITCH RESET STM6503 VCC SR0 SR1 RST tSRC tREC |
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