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AN3269 数据表(PDF) 9 Page - STMicroelectronics |
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AN3269 数据表(HTML) 9 Page - STMicroelectronics |
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9 / 19 page ![]() AN3269 Application description Doc ID 17904 Rev 1 9/19 1.5.2 Bias current record This operation consists of storing in memory the value of the bias current inherent to operational amplifier A (see Figure 2) of your STM8L-DISCOVERY. The bias current value is taken into account for low power measurements in order to minimize measurement errors. Once recorded, this value does not need to be refreshed and is kept in non-volatile memory for future use. It is recommended to perform this operation when you start your evaluation in order to obtain the best precision. This mode is only accessible at application power-up by executing the following actions in the order below: ● Switch OFF STM8L-DISCOVERY ● Place JP1 in OFF position (IDD measurement disabled) ● Maintain USER push-button pressed while switching ON the STM8L-DISCOVERY ● At power on, a scrolling message “Bias Current” is displayed ● Release the USER push-button; the bias current value is displayed and immediately stored in non-volatile memory Once this operation completed, replace JP1 in ON position so that the measurement circuitry connects again to STM8L152 (IDD measurement enabled). 1.5.3 Manufacturing test You can access this mode while Demo mode is running, by pressing the USER push-button for more than 3 seconds and by releasing it. This allows you to verify that the hardware modules needed by the STM8L-DISCOVERY for this example are working properly. In this mode, application checks the LSE oscillator (Low Speed External), VDD voltage value, IDD RUN, IDD HALT and LP (low power) IDD currents. The currents are tested with lower and upper limits. For each test function, the application displays “OK” and the measured values when available. If all checks are successfully completed, then the message “TEST OK” is continuously displayed. If one of the tests fails, then the application alerts the user by continuously displaying the test name followed by “NO OK”. To exit this manufacturing test, press the RESET button. Note: Generally, if the manufacturing test is not successful, first check that JP1 is placed in the ON position and that solder bridges SB11 to SB17 are shorted. If errors are found in the Low power and Halt modes IDD measurements, the bias current record operation should be performed again. 1.6 Low power modes The low power modes used in this application example are: ● Low power run mode (with or without LCD): In this mode the CPU and some of the peripherals are running. As selected, the LCD can be used or not. In the latter case, the LCD and the RTC clock are disabled to save power and GPIOs are placed in output push-pull configuration to limit consumption. During Low power run mode, the code is executed from RAM and CPU is clocked by the LSI oscillator. Flash and data EEPROM are stopped and the voltage regulator is configured in Ultra low power mode. The |
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