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AN3320 数据表(PDF) 7 Page - STMicroelectronics

部件名 AN3320
功能描述  This application note is intended for system designers
PDF  29 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

AN3320 数据表(HTML) 7 Page - STMicroelectronics

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AN3320
Power supplies
Doc ID 18267 Rev 2
7/29
1.1.1
Independent A/D converter supply and reference voltage
To improve conversion accuracy, the ADC has an independent power supply that can be
filtered separately, and shielded from noise on the PCB.
●
the ADC voltage supply input is available on a separate VDDA pin
●
an isolated supply ground connection is provided on the VSSA pin
When available (depending on package), VREF– must be tied to VSSA.
On 100-pin package and above and on WLCSP64+2
To ensure a better accuracy on low-voltage inputs, the user can connect a separate external
reference voltage ADC input on VREF+. The voltage on VREF+ may range from 1.8 V to
VDDA. On WLCSP64+2, the VREF- pin is not available, it is internally connected to the ADC
ground (VSSA).
On 64-pin packages
The VREF+ and VREF- pins are not available, they are internally connected to the ADC
voltage supply (VDDA) and ground (VSSA).
1.1.2
Battery backup
To retain the content of the Backup registers when VDD is turned off, the VBAT pin can be
connected to an optional standby voltage supplied by a battery or another source.
The VBAT pin also powers the RTC unit, allowing the RTC to operate even when the main
digital supply (VDD) is turned off. The switch to the VBAT supply is controlled by the power
down reset (PDR) circuitry embedded in the Reset block.
If no external battery is used in the application, it is highly recommended to connect VBAT
externally to VDD.
1.1.3
Voltage regulator
The voltage regulator is always enabled after reset. It works in three different modes
depending on the application modes.
●
in Run mode, the regulator supplies full power to the 1.2 V domain (core, memories
and digital peripherals)
●
in Stop mode, the regulator supplies low power to the 1.2 V domain, preserving the
contents of the registers and SRAM
●
in Standby mode, the regulator is powered down. The contents of the registers and
SRAM are lost except for those concerned with the Standby circuitry and the Backup
domain.
Note:
Depending on the selected package, there are specific pins that should be connected either
to VSS or VDD to activate or deactivate the voltage regulator. Refer to section "Voltage
regulator" in STM32F20xxx/21xxx datasheet for details.



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