DocID018532 Rev 3

3/13

PM0083

Hardware interface

1

Hardware interface

This section provides information on the hardware interface used to program the OTP

options. For detailed information on other aspects of the device please refer to the

STM8T143 datasheet.

1.1

External components

The STM8T143 has an internal voltage regulator that needs an external capacitor on the

VREG pin to function correctly. For a cleaner external supply a 1µF capacitor and a ceramic

100 pF capacitor between VREG & VSS is also recommended. It is recommended to place

a 1 µF capacitor between VDD and VSS.

Note:

The VREG capacitors should be placed as close as possible to the VREG & VSS pins of the

STM8T143.

Figure 1. External components and communication lines

1.2

Communication lines

•

CX: Data (bi-directional)

•

POUT: Programming mode entry clock and serial communication clock

CX

VREG

1μF

100pF

1μF

VDD

V

DD

VSS

POUT

Programming mode

control/clock

Data

(bidirectional)