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AN4062 数据表(PDF) 9 Page - STMicroelectronics |
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AN4062 数据表(HTML) 9 Page - STMicroelectronics |
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9 / 17 page ![]() DocID022897 Rev 3 9/17 AN4062 Peripheral firmware examples description number of sectors to be used. These sectors are erased one-by-one by calling the FLASH_EraseSector function. • The programming operation is performed by using the FLASH_ProgramWord function. The written data is then checked and the result of the programming operation is stored in the MemoryProgramStatus variable. 3.8 IWDG (independent watchdog) example Purpose This example shows how to update the IWDG reload counter at regular periods, and how to simulate a software fault generating an MCU IWDG reset on expiry of a programmed time period. Description In this example: • The independent watchdog timeout is set to 250 ms. • The system tick is configured to generate an interrupt every 250 ms. • In the system tick interrupt service routine, the independent watchdog counter is reloaded to prevent an independent watchdog reset, and LED4 is toggled. • The EXTI line 0 connected to PA0 pin is configured to generate an interrupt on its falling edge. • In the NVIC, this EXTI line 0 corresponding interrupt vector is enabled with a priority equal to 0, and the systick interrupt vector priority is set to 1 (EXTI interrupt is prior to systick interrupt). • The EXTI line is used to simulate a firmware failure: when the EXTI line event is triggered (after pressing the User push-button on the STM32F0DISCOVERY board), the corresponding interrupt is serviced. In the ISR, LED3 turns off and the EXTI line pending bit is not cleared. The CPU executes the EXTI line ISR indefinitely and the system tick interrupt routine is never entered, so the independent watchdog counter is not reloaded. As a result, when the independent watchdog counter reaches 00, the independent watchdog generates a reset. When the program is running and the independent watchdog reset is generated, LED4 is turned on after the system resumes operation. 3.9 ADC DMA example Purpose This example describes how to use ADC1 and DMA to transfer continuously converted data from ADC1 to memory. |
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